10 Sound

In addition to 4 channels of CGB-compatible sound, AGB has 2 channels of direct sound.

1. Direct Sounds A and B

2. Sound 1

3. Sound 2

4. Sound 3

5. Sound 4

         Can generate white noise with the envelope function.

     The synthesis ratio of sounds 1-4 to direct sound can be specified.

10.1 Sound Block Diagram

10.2 Direct Sounds A and B

Direct sounds have 2 channels, A and B. Linear 8-bit audio data can be played back.

The audio data are set to a bias level of 00h and are 8-bit data (+127 to -128), obtained by 2's complement.

Audio data are transferred sequentially to the sound FIFO (8-word capacity), using the sound FIFO transfer mode of DMA 1 and 2.

The sampling rate can be set to an arbitrary value using timers 0 and 1.

Sound FIFO Input Register

Sound Data

All sounds are PWM modulated (refer to 10.8 Sound PWM Control) at the final portion of the Sound Circuit. Therefore, if you match the 8 bit audio data sampling frequency and the timer settings with the PWM modulation sampling frequency, a clean sound can be produced.

The following operations are repeated for direct sound.

Preparing to Use Direct Sound

  1. Using sound control register SGCNT0_H (refer to 10.7 "Sound Control"), select the timer channel to be used (0 or 1).
  2. Using sound control register SGCNT0_H, do a 0 clear with FIFO A and FIFO B, and initialize the sequencer.
  3. In cases of producing a sound immediately after starting the direct sound, write the first 8 bits of linear audio data to the FIFO with a CPU write.
  4. Specify the transfer mode for DMA 1 or 2 (see 12.2 DMA 1 and 2).
  5. Specify the direct sound outputs settings in the sound control register.
  6. Start the timer.

With the preceding preparations, direct sound is executed as follows.

Direct Sound Execution

  1. When the specified timer overflows due to a count up, the audio data are passed from the FIFO to the sound circuit.
  2. If 4 words of data remain in the FIFO as the transfer count progresses, the FIFOs for direct sounds A and B output a data transfer request to the specified DMA channel.
  3. If the DMA channel receiving the request is in sound FIFO transfer mode, 4 words of data are provided to the sound FIFO (the DMA WORD COUNT is ignored).

10.3 Sound 1

Sound 1 is a circuit that generates rectangular waveforms with sweep (frequency change) and envelope (volume change) functions.

The contents of NR10, NR11, NR12, NR13, and NR14 for Sound 1, conform with those of CGB.

SG10_L [d06-04] Sweep Time

Setting 

Sweep Time 

000 

Sweep OFF 

001 

1/f128 (7.8 ms) 

010 

2/f128 (15.6 ms) 

011 

3/f128 (23.4 ms) 

100 

4/f128 (31.3 ms) 

101 

5/f128 (39.1 ms) 

110 

6/f128 (46.9 ms) 

111 

7/f128 (54.7 ms) 

SG10_L [d03] Sweep Increase/Decrease

SG10_L [d02-00] Number of Sweep Shifts

    If the addition according to this formula produces a value consisting of more than 11 bits, sound output is stopped and the Sound 1 ON flag (bit 0) of NR52 is reset.

    With subtraction, if the subtrahend is less than 0, the pre-subtraction value is used. However, if the specified setting is 0, shifting does not occur and the frequency is unchanged.

SG10_H [d15-12] Envelope Initial-Value

    Allows specification of any of 16 levels ranging from maximum to mute.

SG10_H [d11] Envelope Increase/Decrease

    Specifies whether to increase or decrease the volume.

SG10_H [d10-08] Number of Envelope Steps

    Sets the length of each step of envelope amplification or attenuation.

    With n the specified value, the length of 1 step (steptime) is determined by the following formula.

    When n = 0, the envelope function is turned off.

SG10_H [d07-06] Waveform Duty Cycle

    Specifies the proportion of amplitude peaks for the waveform.

SG10_H [d05-00] Sound Length

    With st signifying the sound length, the length of the output sound is determined by the following formula.

SG11 [d15] Initialization Flag

    A setting of 1 causes Sound 1 to restart.
    When the sweep function is used, set the initialization flag again after an interval of 8 clocks or more.

SG11 [d14] Sound Length Flag

    When 0, sound is continuously output.

    When 1, sound is output for only the length of time specified for the sound length in NR11.

    When sound output ends, the Sound 1 ON flag of NR52 is reset.

SG11 [d10-00] Frequency Data

    With fdat signifying the frequency, the output frequency (f) is determined by the following formula.

    Thus, the specifiable range of frequencies is 64 to 131.1 KHz.

[Sound 1 Usage Notes]

1. When the sweep function is not used, the sweep time should be set to 0 and the sweep increase/decrease flag should be set to 1.

2. If the sweep increase/decrease flag of NR10 is set to 0, the number of sweep shifts is set to a non-zero value, and sweep OFF mode is set, sound production may be stopped.

3. When a value is written to the envelope register, sound output becomes unstable before the initialization flag is set. Therefore, set the initialization flag immediately after writing a value to the envelope register.

4. For sound 1, if you change the frequency when selecting a continuous operation mode (sound length flag of NR-14 is 0), always set 0 for the data of sound length (lower 6 bits of NR11) after setting the frequency data. If 0 is not set, sound may stop prematurely.

5. If the Sound 1 initialization flag is set when the sweep function is used, always set the initialization flag again after an interval of 8 clocks or more. Unless the initialization flag is set twice with an interval of 8 clocks or more, the sound may not be heard.

10.4 Sound 2

    Sound 2 is a circuit that generates rectangular waveforms with envelope functions.

    The contents of NR21, NR22, NR23, NR24 for Sound 2,conform with those of CGB.

SG20 [d15-12] Envelope Initial-Value

    Allows specification of any one of 16 levels ranging from maximum to mute.

SG20 [d11] Envelope Increase/Decrease

    Specifies whether volume will increase or decrease.

SG20 [d10-08] Number of Envelope Steps

    Sets the length of 1 step of envelope amplification or attenuation.

    With n signifying the value specified, the length of 1 step (steptime) is determined by the following formula.

    When n=0, the envelope function is turned off.

SG20 [d07-06] Waveform Duty Cycle

    Specifies the proportion of waveform amplitude peaks.

SG20 [d05-00] Sound Length

    With st signifying the sound length data, the length of the output sound is determined by the following formula.

SG21 [d15] Initialization Flag

    A setting of 1 causes Sound 2 to be restarted.

SG21 [d14] Sound Length

    Continuous sound output with 0; with 1, sound output only for the time specified in the sound length data of NR21.

    When sound output ends, the Sound 2 ON flag of NR52 is reset.

SG21 [d10-00] Frequency Data

    With fdat signifying the frequency data, the output frequency is determined by the following formula.

    Thus, the frequency range that can be specified is 64 to 131.1 KHz.

[Sound 2 Usage Note]

    1. When a value is written to the envelop register, sound output becomes unstable before the initialization flag is set. Therefore, set the initialization flag immediately after writing a value to the envelope register.

    2. For sound 2, if you change the frequency when selecting a consecutive ooperation mode (Reset the sound length flag of NR24), always set 0 for the data of sound length (lower 6 bits of NR21) after setting the frequency data. If 0 is not set, sound may stop prematurely.

10.5 Sound 3

    The Sound 3 circuit outputs arbitrary waveforms and can automatically read waveform patterns (1 cycle) in waveform RAM and output them while modifying their length, frequency, and level.

    The capacity of the waveform RAM of Sound 3 in AGB (total of 64 steps) is twice that in CGB, and can be used as 2 banks of 32 steps or as 64 steps.

    In addition, a new output level of 3/4 output can now be selected.

    The contents of NR30, NR31, NR32, NR33, NR34 for Sound 3, add the functionalitities listed above to those of CGB.

SG30_L [d07] Sound Output Flag

    Sound output stops when 0; sound output occurs when 1.

SG30_L [d06] Waveform RAM Bank Specification

    Two banks of waveform RAM are provided, banks 0 and 1. The Sound 3 circuit plays the waveform data in the specified bank.

    When waveform RAM is accessed by the user, the bank not specified is accessed.

SG30_L [d05] Waveform RAM Data Association Specification

    When 0 is specified, 32-step waveform pattern is constructed under normal operation.

    With a setting of 1, the data in the bank specified by NR30 [d06] (waveform RAM bank specification) is played, followed immediately by the data in the back bank.

    The front bank 32 steps and the back bank 32 steps combine to form a waveform pattern with a total of 64 steps.

SG30_H [d15] Forced 3/4 Output Level Specification Flag

    With 0 specified, the output level specified in NR32 [d14-13] is used.

    A setting of 1 forces a 3/4 output level regardless of the setting in NR32 [d14-13].

SG30_H [d14-13] Output Level Selection

    The Sound 3 output-level selections are as shown in the following table.

    Setting 

    Output Level 

    00 

    Mute 

    01 

    Outputs the waveform RAM data unmodified. 

    10 

    Outputs the waveform RAM data with the contents right-shifted 1 bit (1/2). 

    11 

    Outputs the waveform RAM data with the contents right-shifted 2 bits (1/4). 

SG30_H [d07-00] Sound Length

    The sound length is determined by the following formula, with st signifying the sound-length setting.

SG31 [d15] Initialization Flag

    When SG30_L[d07] is 1, a setting of 1 in this bit causes Sound 3 to restart.

SG31 [d14] Sound Length Flag

    When 0, sound is continuously output.

    When 1, sound is output for only the length of time specified for the sound length in NR31.

    When sound output ends, the Sound 2 ON flag of NR52 is reset.

SG31 [d10-00] Frequency Data

    With fdat signifying the frequency, the output frequency (f) is determined by the following formula.

    Thus, the specifiable range of frequencies is 64 to 131.1 KHz.

[Sound 3 Usage Note]

    1. When changing the frequency during Sound 3 output, do not set the initialization flag. The contents of waveform RAM  may be corrupted. With sounds 1, 2 , and 4, the initialization flag can be set without problems.

    2. For sound 3, if you change the frequency when selectign a consecutive operation mode (Reset the sound length flag of NR34), always set 0 for the data of sound length (NR31) after setting the frequency data. If 0 is not set, sound may stop prematurely.

    3. Always set data in the waveform RAM first when using Sound 3.  If the initization flag is set while Sound 3 is running (Sound 3 ON flag = 1), the content of the waveform RAM may be destroyed.

Waveform RAM

    Waveform RAM consists of a 4-bit x 32-step waveform pattern. It has 2 banks, with [d06] of SG30_L used for bank specification.

    The Sound 3 circuit plays the waveform data specified by the bank setting, while the waveform RAM not specified is the waveform RAM accessed by the user.

10.6 Sound 4

    Sound 4 is a circuit that generates white noise with the envelope function.

    The contents of NR41, NR42, NR43, and NR44 for Sound 4 conform with those of CGB.

SG40 [d15-12] Envelope Initial-Value

    Allows specification of any of 16 levels ranging from maximum to mute.

SG40 [d11] Envelope Increase/Decrease

    Specifies whether to increase or decrease the volume.

SG40 [d10-08] Number of Envelope Steps

    Sets the length of each step of envelope amplification or attenuation.

    With n the specified value, the length of 1 step (steptime) is determined by the following formula.

    When n = 0, the envelope function is turned off.

SG40 [d05-00] Sound Length

    With st signifying the sound length, the length of the output sound is determined by the following formula.

SG41 [d15] Initialization Flag

    A setting of 1 causes Sound 4 to be restarted.

SG41 [d14] Sound Length

    Continuous sound output with 0; with 1, sound output only for the time specified in the sound length data of NR41.

    When sound output ends, the Sound 4 ON flag of NR52 is reset.

SG41 [d07-04] Polynomial Counter Shift Clock Frequency Selection

    With n signifying the specified value, the shift clock frequency (shiftfreq) is selected as shown in the following formula.

    However, %1110 and %1111 are prohibited codes.

SG41 [d03] Polynomial Counter Step Number Selection

    A value of 0 selects 15 steps; 1 selects 7 steps.

SG41 [d02-00] Dividing Ratio Frequency Selection

    Selects a 14-step prescalar input clock to produce the shift clock for the polynomial counter.

    With f=4.194304 MHz, selection is as shown in the following table.

Setting 

Dividing Ratio Frequency 

000 

fx1/23x2 

001 

fx1/23x1 

010 

fx1/23x(1/2) 

011 

fx1/23x(1/3) 

100 

fx1/23x(1/4) 

101 

fx1/23x(1/5) 

110 

fx1/23x(1/6) 

111 

fx1/23x(1/7) 

[Sound 4 Usage Note]

    When a value is written to the envelope register, sound output becomes unstable before the initialization flag is set.  Therefore, set the initialization flag immediately after writing a value to the envelope register.

10.7 Sound Control

    The output ratio for direct sound and sound can be set using the SGCNT0_H register. Final sound control can be achieved with the SGCNT0_L register.

    NR50 and NR51 are each based on their counterparts in CGB.

SGCNT0_L [d15-12] L Output Flag for each Sound

    No output of that sound to L when 0.

    Output of that sound to L when 1.

SGCNT0_L [d11-08] R Output Flag for each Sound

    No output of that sound to R when 0.

    Output of that sound to R when 1.

SGCNT0_L [d06-04] L Output Level

    L output level can be set to any of 8 levels.

    However, there is no effect on direct sound.

SGCNT0_L [d02-00] R Output Level

    R output level can be set to any of 8 levels.

    However, there is no effect on direct sound.

SGCNT1 [d07] All Sounds Operation Flag

    The master flag that controls whether sound functions as a whole are operating.

    A setting of 0 halts all sound functions including direct sound, producing a mute state.

    In this situation, the contents of all Sound mode registers are reset.

    Always set all the sound operation flags to 1 when setting each sound mode register.   You cannot set each sound mode register when all the sound has stopped.

SGCNT1 [d03, d03, d01, d00] Sound Operation Flags

    Each sound circuit's status can be referenced.

    Each sound is set during output, and when in counter mode it is reset after the time passes which was set up with the length data.

SGCNT0_H [d15],[d11] FIFO Clear and Sequencer Reset for Each Direct Sound

    With direct sound the sequencer counts the number of times data is transmitted from FIFO to the mixing circuit. A setting of 1 resets the FIFO and sequencer used for each direct sound. When this bit is read, 0 is returned.

SGCNT0_H [d14],[d10] Timer Selection for Each Direct Sound

    Specifies the timer used for each direct sound.

    A setting of 0 selects timer 0, and 1 selects timer 1.

    The same timer can be specified for both direct sounds (A and B).

SGCNT0_H [d13],[d09] L Output for Each Direct Sound

    Controls the output to L for each direct sound. A setting of 0 results in no output to L; a setting of 1 causes output to L.

SGCNT0_H [d12],[d08] R Output for Each Direct Sound

    Controls the output to R for each direct sound. A setting of 0 results in no output to R; a setting of 1 causes output to R.

SGCNT0_H [d03],[d02] Output Ratio for Each Direct Sound

    Selects the output level for each direct sound.

    A setting of 0 produces output that is 1/2 of full range. A setting of 1 results in full-range output.

SGCNT0_H [d01-00] Output Ratio for Synthesis of Sounds 1-4

    Specifies the output level for the synthesis of sounds 1-4.

    A setting of 00 results in output that is 1/4 of full range.

    A setting of 01 results in output that is 1/2 of full range.

    A setting of 10 results in full-range output.

    A setting of 11 is a prohibited code.

10.8 Sound PWM Control

    Bit modulation format PWM is used in the AGB sound circuit. When no sound is produced, the duty waveform is output, and bias voltage is provided. The PWM circuit is stopped when the setting for duty is 0h.

    This register is used by system ROM. This can be the cause of errors, therefore be careful not to write to this register.

    SG_BIAS[d15-14] Amplitude Resolution/Sampling Cycle

    This sets the amplitude resolution and sampling cycle frequency during PWM modulation.

    The DMG compatible sound is input at 4 bits/130.93KHz so in order to have accurate modulation the sampling frequency must be set high. Direct sound will arbitrarily decide the sampling frequency based on the timer setting. By using the sampling frequencies listed in the table below, an accurate modulation can be done. Thus, in order to increase authenticity of sound, the amplitude resolution needs to be set higher. When producing both compatible sound and direct sound, find a value that will work for both and set this.

    Setting 

    Amplitude Resolution 

    Sampling Frequency 

    00 

    9bit 

    32.768KHz 

    01 

    8bit 

    65.536KHz 

    10 

    7bit 

    131.072KHz 

    11 

    6bit 

    262.144KHz 

PWM Conversion Image

    SG_BIAS[d09-00] Bias Level

    This is used by system ROM. Please do not change this value, as it may cause errors.